Please use this identifier to cite or link to this item: http://hdl.handle.net/123456789/25295
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dc.contributor.authorAbdullah, Ahmad Makarimi-
dc.contributor.authorYaacob, Khatijah Aisha-
dc.contributor.authorLockman, Zainovia-
dc.contributor.authorHutagalung, Sabar Derita-
dc.contributor.authorUniKL MIMET-
dc.date.accessioned2022-01-28T01:23:21Z-
dc.date.available2022-01-28T01:23:21Z-
dc.date.issued2022-01-28-
dc.identifier.isbn978-981-15-0002-2-
dc.identifier.urihttp://hdl.handle.net/123456789/25295-
dc.descriptionThis article indexed by scopusen_US
dc.description.abstractSilicon nanowires (SiNWs) have been a great candidate to be used in development of electronic devices because it is easy to prepare in small dimension with high surface to volume ratio and its sensitivity of the carrier mobility to the variation in the electric field at their surface. Silicon nanowires (SiNWs) can be prepared using both “bottom-up” and “top-down” approached. AFM lithography is one of top-down approach used to fabricate the silicon nanowires by using the local anodic oxidation (LAO) process. The local anodic oxidation process involves the application of a positive voltage between the AFM tip and the surface of the silicon-on-insulator (SOI) wafer in the atmosphere with high relative humidity. The humidity in the ambient will generates a meniscus of water between the AFM tips and SOI wafer. The applied voltage on the tips will ionizes the water molecules and producing OH- ions, which will react with silicon on SOI wafer and form silicon oxide patterned on SOI wafer. Several AFM lithography important parameters in the patterning of the oxide mask, such as substrate surface roughness, applied voltage, writing speed and relative humidity were discussed. After the oxide pattern growth, the SOI wafers were undergo for chemical etching to remove silicon and SiNWs were formed.en_US
dc.language.isoenen_US
dc.subjectSilicon nanowiresen_US
dc.subjectAFM lithographyen_US
dc.titleImportant Parameter Related to AFM Lithography for Fabrication of Silicon Nanowiresen_US
dc.typeBook chapteren_US
dc.conference.year2020en_US
Appears in Collections:Conference Paper



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