Abstract:
A low power Folded Cascode Track and Hold Amplifier (THA) circuit has been designed and analysed. The design of THA is to facilitate the development of ADC with specification 12-bit resolution, 125kSPS, and 1MHz. THA is used to sample and hold the input signal before it is being digitized. Ideally, signal that passed through THA circuit should not degrade the quality. Therefore high gain factor is very important to maintain the virtual ground on THA circuit. A simulation analysis was carried out to explore the operation of three different types of Folded Cascode circuits with the aims to identify the best techniques for increasing gain, decreasing speed and good ICMR parameter. The simulation was carried out at gate level using CMOS 0.18μm mixed signal process technology.
